Freescale Semiconductor /MKL28T7_CORE1 /USB0 /KEEP_ALIVE_CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as KEEP_ALIVE_CTRL

7 43 0 0 00 0 0 0 0 0 0 0 0 (KEEP_ALIVE_EN)KEEP_ALIVE_EN 0 (OWN_OVERRD_EN)OWN_OVERRD_EN 0 (0)WAKE_REQ_EN 0 (WAKE_INT_EN)WAKE_INT_EN 0 (WAKE_INT_STS)WAKE_INT_STS

WAKE_REQ_EN=0

Description

Keep Alive mode control

Fields

KEEP_ALIVE_EN

Global enable for USB_KEEP_ALIVE mode

OWN_OVERRD_EN

When set to 1, during KEEP_ALIVE mode, if received token is not SETUP, the OWN bit of current BD will be forced to 0, so usb core will respond with NAK

WAKE_REQ_EN

During KEEP_ALIVE mode, a bus access by the USB controller to a memory location outside the USB SRAM will cause the bus access to stall until KEEP_ALIVE mode is exited

0 (0): USB bus wakeup request is disabled.

1 (1): USB bus wakeup request is enabled.

WAKE_INT_EN

Wakeup Interrupt Enable.

WAKE_INT_STS

Wakeup Interrupt Status.

Links

() ()